Tomato started at the transistor — an 8-bit ALU from 3,488 MOSFETs — and kept climbing: gates, slices, boards, a CPU that can speak dozens of foreign ISAs while remaining one physical machine underneath. Most CPUs hide a small ALU behind a conventional encoding. This one flipped it.

The dual-LUT slice is the center. Matching every LUT pair to its own instruction was never the goal. The 512-row ROM burns what programs need today; the rest of the plane waits.

alu_out = adder( f(a, b, c), g(a, b, c), carry_in )

Fig. — The nibbleLUT3 feeds the adder. No mode mux at the end of the slice.

The word

Typical packing for ALU register ops. Low bits are often double-booked as immediate or branch overlay, depending on the mnemonic.

Native ALU syntax, conceptual: opcode rd, rA, rB, rC — destination is f + g + cin. Thirty-two GPR times eight banks is 256 addressable registers — enough to wire without widening the datapath.

Decode travels with the board

One central microcode blob is elegant in simulation and miserable on a breadboard. Tomato split decode into small boards with local EEPROMs. They all listen to the same opcode from the IR. Each sits next to the hardware it drives.

Fig. — main.digalu-control, ir-reg, mem-io, mem-bus, pc, shift-mul