I’m Tyrone Marhguy.

I start from first principles, find the right primitive, and iterate until the design is correct and efficient.

I’m Tyrone Iras Marhguy. Tomato is how I put that approach into practice: rethink the ALU, build a computer around it, and write the software it runs. Explore my work or read my story.

If you take a look at the bottom of the board, there is…

Builder · Quaker · Class of 2028

Penn Engineering, because I am a Quaker, and ENIAC sat in the Moore School a few buildings over. The Achimota mark, because that is the public school the board is allowed to remember. The Ghana flag, because the paper is printed in Ashtown Valley even when the copper lands in Philadelphia.

The work

I build computer systems across discrete logic, processor architecture, RTL, and verification. Computer Engineering at the University of Pennsylvania — architecture, RTL, and verification. I work where hardware meets software: boards, SystemVerilog, and the constrained-random environments that test them.

Currently: Hardware Research Engineer (Fall 2026) at Fluid Silicon (RTL & emulation, Pennovation) and Software Engineer at Aragorn AI. Previously: Hardware & Firmware Engineer at Vero Electric (PCB design & board bring-up).

Open source

Project	Contribution	Shipped
LibreLane	chk.rpt — pre- and post-synth errors both count · #1016	3.0.10
LibreLane	Yosys ≥ 0.68 abc -fast — synthesis no longer dies · #1015	3.0.8
Verilator	Linux peak-memory stats — --stats matches real RSS · #8070	merged
OpenROAD	MINWIDTH WRONGDIRECTION — production LEF files load · #11107	merged
OpenFPGA	Contribution & interconnect docs — syntax matches the parser · #2682 · #2683	merged

Open-source build log

Working on

Highlights — all projects · full résumé

Hardware

Project	What it is
Tomato · GitHub	Custom 32-bit CPU · discrete logic through PCB fabrication · this paper
16×4 SRAM	6T macro in 22 nm HP · StrongARM sense amp · 4.571 GHz fmax
SPICE automation	NGSpice fmax binary search · parametric PPA sweeps · JSON/CSV/Markdown reports
16-bit MAC, Sky130	BFloat16 MAC · OpenLane · TinyTapeout
NASDAQ ITCH parser	Market-data FPGA on Artix-7 · cocotb
UDP/IP stack	100 Mbps · RMII/MAC/ARP/IP/UDP · sub-200 ns loopback
8-bit transistor ALU	3,488 total transistors: 624 discrete MOSFETs + 2,864 inside 74HC logic · 1.24M+ automated test vectors

Tools & software

Project	What it is
Mango Tools	Offline CLI for PDF, media & images
Orange Metrics API	Vivado & OpenLane PPA ingestion · FastAPI · PostgreSQL · Docker
QueuePaste	macOS clipboard queue · ⌥ Space to paste
Music & You	Personality from Spotify listening · Next.js · scikit-learn
UniBridge Ghana	University admissions platform · FastAPI · PostgreSQL
SVD compression engine	Cache-optimized matrix ops from scratch

Experience

Role	When	Notes
Aragorn AI — Software Engineering Intern	Present	Documentation and backend
Fluid Silicon — Hardware Research Engineer Intern	Fall 2026	RTL & emulation · Pennovation
Howard STEM Achievers — STEM Instructor	Jun–Jul 2026	AR/VR
Vero Electric — Hardware & Firmware Engineer	May–Aug 2026	Battery management infrastructure
Fife-Penn — Programming & Engineering Instructor	Feb–May 2025	After-school engineering
Penn Engineering — CIS 1100 Teaching Assistant	2024–2025	Intro programming

Skills

• Hardware SystemVerilog · UVM / SVA · cocotb · Verilator · SymbiYosys · Questa · Vivado · Yosys / nextpnr · RISC-V · Wishbone · Digital · KiCad · LibreLane / OpenROAD / Sky130 · NGSpice · embedded C/C++ · SPI/I²C · Arduino
• Software Python · C/C++ · TypeScript · Next.js · Swift · FastAPI · PostgreSQL · Pytest · Docker
• Practice constrained-random + golden-model scoreboards · formal (SymbiYosys) · timing closure · board bring-up · FOSS FPGA bring-up

Off the bench: beach, dogs, sudoku, biking. Portfolio, résumé, and the rest of the tree — tmarhguy.com.