The machine
A complete FPGA computer.
A discrete ALU on copper.
256 × 32-bit registers in current FPGA RTL — eight banks of 32, with r0 fixed to zero. Dual-LUT copper underneath — 10 billion Verilator vectors on the byte slice, 130 billion on the 32-bit ALU, SymbiYosys on the datapath. Register Upgrade
- 32-bithomebrew CPU
- 74xxdiscrete copper
- 524,288ALU configurations
- 256 FPGA registerscurrent RTL · eight banks
- ISA512-row ROM
- Tomato OS~2.3k asm lines
When I decided to build a discrete computer on my own architecture from the transistor level, the engineering unknowns were massive—but I decided to stay long enough to resolve every single one. Tomato is the evolution of my earlier 3,488-MOSFET ALU.
Hand-soldering 3,488 transistors sounded cool, but time constraints became real. To survive, the architecture pivoted from a conventional pipeline to a polymorphic Dual-LUT3 datapath where the opcode itself is the computational value.
It behaves like a coarse-grain FPGA fabric tuned to the lowest viable unit. It melts
multi-cycle software bottlenecks into native hardware primitives, transforming a fixed ALU into a 32-bit
machine that synthesizes Boolean logic on the fly. Think computing (A ∧ B) ⊕ (¬A ∧ C)—the SHA-256 Choose function—in a single clock cycle, an operation that burns 4 cycles on a conventional RISC-V core.
